In recent years, with the speed-up and high integration of semiconductor integrated circuit, miniaturization of elements, such as transistors, has progressed. Corresponding to this miniaturization, miniaturization of wiring has been attempted to improve a wiring delay.
For this reason, the wiring using a copper (Cu), which has a lower resistance and high EM (Electro-migration) resistance property, has been actively developed instead of the aluminum alloy conventionally used in the wiring material of LSIs (Large Scale Integration).
However, in the wiring mainly containing the copper, a cap film is formed on the wiring in order to suppress the copper from diffusing into an insulator formed over the wiring. Meanwhile, an oxide may be formed on the surface of the wiring before forming the cap film, because the copper has a property that is easy to be oxidized. This may contribute to the reduction in the adhesiveness between the wiring and the cap film. Thus, methods for forming the cap film, which has favorable adhesiveness, onto the wiring have been developed. Following are the examples of conventional techniques to achieve objectives described above.
Unexamined Japanese Patent Application Publication No. 2003-347299 discloses a technique for forming a cap film on a wiring by a process for accumulating an insulator on the wiring by a chemical vapor deposition method using a organosilane gas as a film forming gas after forming the wiring mainly containing a copper, applying an ammonia plasma process, and apply a solution heat treatment of a first atom to the surface of the wiring in order to suppress or prevent the copper infusion.
Unexamined Japanese Patent Application Publication No. 2006-165597 discloses a technique for forming an insulator for wiring capping without oxidizing a conductive barrier film of a wiring mainly consisting of copper. Specifically, when performing a reducing plasma process to a buried second layer wiring L2, the power applied to a first electrode retaining a wafer is reduced to a lower value compare to a second electrode facing to the wafer, or down to zero. In this way, the exposed surface of the conductive barrier film 17a of the buried second layer wiring L2 is azotized, thus the disclosed technique is capable of suppressing or preventing the exposed section of the conductive barrier film 17a from being oxidized.
Unexamined Japanese Patent Application Publication No. 2006-294679 discloses a manufacturing method of a semiconductor device, and the method includes the steps of forming an insulator having a relative permittivity of not more than 3 onto a substrate, forming a wiring consisting of Cu in the insulator, supplying a reducing gas on the surface of the wiring, and forming a barrier film on the wiring after supplying the reducing gas. That is, it is characterized by forming the barrier film without supplying a plasma to the surface of the wiring prior to forming the barrier film.
Unexamined Japanese Patent Application Publication No. 2003-142579 discloses a technique of preventing a conductive barrier film 17a of a buried second layer wiring L2 from oxidizing in a semiconductor device having the buried wiring structure comprising copper when forming an insulator 15b for wiring capping, for example, by SiON film formed by a plasma CVD method using a mixed gas of trimethoxysilane gas and nitric oxide gas. Specifically, a third insulator (insulator 15b) is accumulated on a second insulator by a chemical vapor deposition method using a gas containing oxygen after accumulating the second insulator at least on the wiring to protect the first conductive film from oxidizing.
However, none of the conventional techniques described above do not realize the forming of cap film on the surface of the conductive layer by a simple process (treatment procedure) due to increase in the number of processes or substantive treatment procedures. For example, the Japanese Unexamined Patent Application Publication No. 2003-347299 requires a process of solution heat treatment of first atom after applying an ammonia plasma process, thus, increase in the number of process (treatment procedure) cannot be avoided. For this reason, the development of a technique capable of forming a cap film on a conductive layer surface using a simpler process (treatment procedure) has been desired.